PC-ADCC-D AC/DC EV Charging Station EVSE Controller
I. Overview
This document describes how to use the PC-ADCC-D AC-DC integrated charging pile controller developed and produced by our company, including hardware interfaces.
PC-ADCC-D type AC and DC integrated charging pile controller meets the European standard and American standard DIN 70121/ISO-15118 communication protocol, Japanese standard CHAdeMO communication protocol, meets AC PWM guidance, meets DC module control, etc. It can be widely used and AC/DC charging pile, easy to realize European and American standard AC and DC charging.
The PC-ADCC-D charging pile whole pile controller developed by our company adopts the mode of bottom plate plus core board. The core board implements the DIN 70121/ISO-15118 communication protocol and is equipped with a complete V2G protocol stack, which meets HomePlug Green PHY 1.1 ( HPGP 1.1) standard PLC (power line communication) communication requirements. Realize the Japanese standard CHAdeMO communication protocol, with a standard extended CAN interface. The backplane expands DIDO, RS232, RS485, CAN, current and voltage detection, temperature detection and other interfaces to realize the detection alarm and electrical control of the whole pile.
II. Main Features
The main features of the PC-ADCC-D AC-DC integrated charging pile controller are:
- Meet the PLC AC and DC charging communication requirements of the HPGP 1.1 standard;
- Meet DIN SPEC 70121:2014-12, and meet ISO/IEC 15118-1/2/3 communication protocol;
- Meet the Japanese standard CHAdeMO 1.0.2 communication protocol;
- With the CP status monitoring function that meets the IEC 61851-1 standard;
- With RS-232, RS-485, CAN BUS and other communication interfaces;
- Using a core board (independent ISO/IEC 15118 SECC) + mother board (pile controller EVSE Pilot controller) combined solution, strong portability, the core board can be extracted for customized development of different piles;
- Cooperate with OCPP-2.0 upper communication controller to realize remote management;
- Firmware online upgrade or USB firmware local upgrade;
- The communication protocol between PC-ADCC-D and the upper OCPP controller can be customized and developed;
III. Technical Parameters
- CPU: ARM cortex-M4 ；
- Memory: 32M SDRAM, 256M nandFlash (options);
- Operating system: uC/OS;
- CAN: 2 channels, 1 channel for controlling the charging module, 1 channel for the Japanese standard CHAdeMO communication;
- CP: PWM detection (ADC);
Voltage: ±12V (±5%)
Duty cycle: 5% (±1%)
Frequency: 1KHz (±1%)
- RS-232: 3 channels, used for communication with credit card machine, OCPP controller, etc.
- RS-485: 2 channels, used for AC and DC meters, insulation testing, etc.
- PLC:Home Plug Green PHY 1.1(HPGP 1.1)；
- DIN: 8 channels (expandable) for lightning protection, emergency stop, electronic lock alarm, etc.;
- DOUT: 20 relays, used for indicator lights, input and output contactors, electronic lock switches, etc.;
- PWM: 3 channels, used for fan control, AC duty cycle control, etc.;
- Battery voltage Hall detection: 2 channels for battery voltage detection of double guns;
- Power consumption: 3W;
- Input voltage: DC 9~36V, 12V is recommended;
- Size: 280mm*120mm*30mm;
- Weight: 450g;
IV. DIN 70121, ISO/IEC15118 communication protocol stack
According to DIN 70121, ISO/IEC1518-1,2,3 protocol content, our company runs uC/OS operating system in MCU controller, builds a seven-layer network architecture, and software realizes the SLAC/SLAAC handshake matching process in Qualcomm HPGP1.1 protocol , Built-in IPv6, TCP/UDP, SDP, V2G communication, etc. comply with ISO/IEC15118 standard protocol requirements.
Figure 1 ISO/IEC15118 V2G software framework diagram:
The PC-ADCC-D controller developed by our company complies with DIN 70121 and ISO/IEC15118 for abnormal errors of all car end pile ends. The TLS security certificate is issued through the OCPP-2.0 upper controller developed by our company to realize reliable and secure communication with EVCC.
The DC charging session process of DIN 70121 and ISO/IEC 15118 is shown in the figure below.
Appendix I
Figure 1 Physical picture of PC-ADCC-D core board
Figure 2 Physical picture of PC-ADCC-D core board plus bottom board
Figure 3 IEC61851-1 charging state diagram
Figure 4 Physical image of PC-ADCC-D
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RS232 EVSE Controller CAN BUS CE AC To DC Charge Controller Images
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